Gate sizing and repeater insertion are two effective methods in the physical design stage for timing closure and power reduction. Even though gate sizes and repeater solutions impact each other, the two methods are traditionally applied sequentially leading to sub-optimal timing/power. Some previous works on simultaneous repeater insertion and gate sizing consider only a single net, sizing its driver in association with repeater insertion in the net. Other previous works consider multiple nets, but fail to consider the conflicts in size requirements in optimizing a multitude of interacting timing paths.